Description: large register file, digital circuit optimization
|(bipartite graph drawing)|
|number of rows||2,111,154|
|number of columns||801,374|
|structural full rank?||yes|
|# of blocks from dmperm||32,778|
|# strongly connected comp.||2|
|explicit zero entries||0|
|nonzero pattern symmetry||0%|
|numeric value symmetry||0%|
|kind||circuit simulation problem|
Circuit optimization for digital circuits. John Peter Stevenson, Stanford. LargeRegFile is a matrix representing an optimization problem. Specifically, it is a geometric program, a kind of convex optimization problem. The matrix entries are the exponents found in the geometric program constraints; specifically, this matrix is a portion of the input required by mskexpopt: http://docs.mosek.com/6.0/capi/node008.html This matrix represents a digital circuit. The circuit is a large register file: 256 registers, 64 bits each, 2 read ports, 1 write port. The optimization problem is to minimize circuit delay, subject to constraints on energy cost and area cost. The optimization variables are the transistor size, the supply voltage, and the threshold voltage. The circuit optimization method is described by Patil, et. al.: Robust energy-efficient adder topologies. In ARITH07: Proceedings of the 18th IEEE Symposium on Computer Arithmetic, pages 16-28, Washington, DC, USA, 2007. IEEE Computer Society.
|nnz(V) for QR, upper bound nnz(L) for LU, with COLAMD||916,786,879|
|nnz(R) for QR, upper bound nnz(U) for LU, with COLAMD||4,902,416|
For a description of the statistics displayed above, click here.
Maintained by Tim Davis, last updated 12-Mar-2014.
Matrix pictures by cspy, a MATLAB function in the CSparse package.
Matrix graphs by Yifan Hu, AT&T Labs Visualization Group.