Editors:    Prabhat Mishra, Swarup Bhunia and Mark Tehranipoor Publisher:   Springer, 2017 ISBN:   978-3-319-49024-3 Contents:           Security and Trust Vulnerabilities in Third-party IPs         Security Rule Check         Digital Circuit Vulnerabilities to Hardware Trojans         Code Coverage Analysis for IP Trust Verification         Analyzing Circuit Layout to Probing Attack         Testing of Side Channel Leakage of Cryptographic IPs: Metrics and Evaluations         Hardware Hardening using Camouflaging, Encryption and Obfuscation         Embedding Multiple Countermeasures Against Passive Side Channel Attacks         Validation of IP Security and Trust         IP Trust Validation using Proof-carrying Hardware         Hardware Trust Verification         Verification of Unspecified IP Functionality         Verifying Security Properties in Modern SoCs using Instruction-level Abstractions         Test Generation for Detection of Malicious Parametric Variations         The Future of Trustworthy SoC Design

Reusable hardware Intellectual Property (IP) based System-on-Chip (SoC) design has emerged as a pervasive design practice in the industry to dramatically reduce design/verification cost while meeting aggressive time-to-market constraints. However, growing reliance on these pre-verified hardware IPs, often gathered from untrusted third-party vendors, severely affects the security and trustworthiness of SoC computing platforms. An important emerging concern with the hardware IPs acquired from external sources is that they may come with deliberate malicious implants to incorporate undesired functionality (e.g. hardware Trojan), undocumented test/debug interface working as hidden backdoor, or other integrity issues (e.g. rare input conditions that violate peak power or temperature constraints). SoC designers typically tend to treat these IPs as black box and rely on the assurances provided by the IP vendors. However, recent investigations by the researchers as well as reported incidences show that such practices make SoCs increasingly vulnerable to security and trust issues. From an IP designer’s point of view, reverse-engineering and piracy of IPs is a major security concern. Even though hardware IP piracy, which can occur at all stages of hardware life-cycle – from IP evaluation to SoC fabrication – is becoming ever more significant due to rapidly evolving business model.

This book will be a comprehensive reference for IP vendors, SoC designers as well as researchers interested in IP security and trust. This book will include contributions from experts in the field IP security and trust. The readers will get the balanced perspectives from both IP provider and IP integration teams/companies in terms of the IP-based SoC design methodology. The book will cover a wide variety of IP models, their security vulnerabilities and potential countermeasures in the form IP trust validation to enable reliable and trustworthy embedded systems design.