%-------------------------------------------------------------------------------
% UF Sparse Matrix Collection, Tim Davis
% http://www.cise.ufl.edu/research/sparse/matrices/Freescale/FullChip
% name: Freescale/FullChip
% [circuit simulation, Kiran Gullapalli, Freescale Semiconductor, Inc.]
% id: 2380
% date: 2011
% author: K. Gullapalli
% ed: T. Davis
% fields: name title A id date author ed kind Zeros notes
% kind: circuit simulation problem
%-------------------------------------------------------------------------------
% notes:
% Full-chip circuit simulation matrix from Kiran Gullapalli, Freescale  
% Semiconductor, Inc.                                                   
%                                                                       
% This is a full-chip (everything that is actually built in silicon is  
% in the netlist), for an automotive part.  For simulation, the         
% flash-memory and sram-memory cores are removed. But everything else is
% in the matrix.                                                        
%                                                                       
% The chip takes an external battery (voltage source), but has internal 
% voltage generators. the node of the external battery can be removed   
% from the matrix. but the internal generators create some VERY HIGH    
% degree nodes. So, there are about 6 nodes with degree greater than    
% 1000 (actually, the degree is 2M+ for 2 of these).                    
%                                                                       
% After ordering, nnz(L+U) = 200,180,468, with about 1.03793E+11        
% flops (a += b * c is counted as one flop).                            
%-------------------------------------------------------------------------------
