Course Syllabus and Lecture Slides

Objective:   This course teaches students fundamental knowledge in computer architecture and microarchitecture. The course covers the basic organizations of computer systems including instruction-set architecture, execution pipeline, memory hierarchy, and I/O subsystem. It also addresses advanced processor microarchitecture issues such as dynamic instruction scheduling, branch prediction, lock-up free caches, instruction-level parallelism, multiple instruction fetch/issuing, speculative execution, etc. to improve computer processor performance. Shared-memory multiprocessor systems with coherent caches to reduce memory access latency are also covered. Finally, it outlines the verification issues of today's microprocessors.

Course Outline:   Tentative course outline is shown below.
  1. Fundamentals of Computer Design
  2. Instruction Set Principles and Examples
  3. Pipelining: Basic and Intermediate Concepts
  4. Instruction-Level Parallelism and Its Exploitation
  5. Limits on Instruction-Level Parallelism
  6. MIDTERM:   October 28 (3:00 - 4:55 in CSE 107).
  7. Review of Memory Hierarchy
  8. Multiprocessors and Thread-Level Parallelism
  9. Memory Hierarchy Design
  10. Storage Systems
  11. Verification of Processor/Memory Architectures
  12. Comprehensive FINAL:   December 16 (3:00 - 5:00 PM in CSE 107).

Please feel free to contact me if you have any questions, comments or suggestions.