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| University of Florida |
| Computer and Information Science and
Engineering |
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| Jih-Kwon Peir |
| Associate Professor |
| Mailing Address: |
301 CSE, P.O. Box 116120
Department of CISE
University of Florida
Gainesville, FL 32611 |
| Office Location: |
E354 CSE |
| Office Phone: |
(352) 392-1044 |
| Departmental FAX: |
(352) 392-1220 |
| Email: |
peir@cise.ufl.edu |
| Website: |
http://www.cise.ufl.edu/~peir | | |
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PhD. University of Illinois,
1986 |
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| Semester |
Number |
Title |
| Spring 09 |
CDA5155 |
Computer Architecture Principles |
| Fall 08 |
CDA3101 |
Introduction to Computer Organization |
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- "Modeling
and Stack Simulation of CMP Caches," X. Shi, F.
Su, J-K. Peir, Y. Xia, Z. Yang, IEEE
Trans. on Parallel and Distributed Systems, accepted to
appear, 2009.
- "Fitting
a Spread Estimator in a Small Memory," M.K. Yoon, T. Li, S.
Chen, J-K. Peir, The
28th Conference on Computer Communications, (Infocom), April 2009.
- “Accessibility
vs. Capacity: Modeling and Single-Pass Stack Simulation on CMP
Caches,” X. Shi,, F. Su, J-K. Peir, Y. Xia, Z. Yang, 2007
IEEE Int'l Symp. on Performance Analysis of Systems and Software
(ISPASS), April 2007.
- “Overlapping Dependent Loads with Addressless Preload,” Z. Yang, X Shi, F
Su, J-K. Peir, The IEEE/ACM 15th Int'l Conf. on Parallel Architectures and
Compilation Techniques (PACT), Sep. 2006.
- "Coterminous Locality and Coterminous Group Data Prefetching on
Chip-Multiprocessors," X. Shi, Z. Yang, J-K. Peir, L. Peng,
Y. Chen, V. Lee, and B. Liang, 20th IEEE Int'l Parallel &
Distributed Processing Symp. (IPDPS), April 2006.
- "Signature Buffer: Bridging Performance Gap between Registers
and Caches," L. Peng, J-K. Peir, and K. Lai, 10th Int'l
Symp. on High Performance Computer Architecture (HPCA), Feb.
2004, pp. 164-175.
- "Address-Free Memory Access Based on Program Syntax Correlation
of Loads and Stores," L. Peng, J-K. Peir, Q. Ma, and K.
Lai, IEEE Transactions on VLSI Systems, Vol. 11(3), June
2003, pp. 314-324.
- "Bloom Filtering Cache Miss for Accurate Data Speculation and
Prefetching," J-K. Peir, S. Lai, S. LU, J. Stark, and K.
Lai, 2002 Int'l Conf. on Supercomputing (ICS), June 2002,
pp. 189-198.
- "Direct Load: Dependence-Linked Dataflow Resolution of Load
Address and Cache Coordinate," B. Chung, J. Zhang, J-K.
Peir, S. Lai, K. Lai, 34th Int'l Symp. on Microarchitecture
(MICRO), Dec. 2001, pp. 76-87.
- "Symbolic Cache: Fast Memory Access Based on Program Syntax
Correlation of Loads and Stores," Q. Ma, J-K. Peir, L. Peng,
and K. Lai, 2001 Int'l Conf. on Computer Design (ICCD),
Sep. 2001, pp. 54-61.
- "Functional Implementation Techniques for CPU Cache
Memories," J-K. Peir, W. Hsu, and A. Smith, IEEE
Transactions on Computers, Special Issue on Cache Memory and
Related Problems, Vol. 48(2), Feb. 1999, pp. 100-110.
- "Capturing Dynamic Memory Reference Behavior with
Adaptive Cache Topology," J-K. Peir, Y. Lee, and W. Hsu, 8th
Int'l Conf. on Architectural Support for Programming Languages and Operating
Systems (ASPLOS), Oct. 1998, pp. 240-250.
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- CAREER Award, National Science Fundation, 1996
- IBM Faculty Research Development Partnership Award, 1995
- Two Best Paper Awards, IEEE Int'l Conf. on Computer Design,
1990, 2001
- IBM Invention Achievement Award, 1992
- Associate Editors, IEEE Trans. on Parallel and Distributed
Systems, Journal of Parallel and Distributed Computing
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