CIS 4930.1194X/6930.1078X Spr.'00
Assignment #5 (Weeks 5-6)
Adiabatic Circuits

Please continue to follow the general advice on reading assignments from the first week's assignment.

Reading assignment:

For these two weeks we will be covering reversible, "adiabatic" circuit technology. Our discussion will focus on showing how adiabatic reversible logic can be implemented using traditional silicon MOSFET technology, but the basic ideas and principles of reversible computing that we'll encounter here will be extensible to a wide variety of alternative future computing technologies as well.

Lecture 12: Basic Principles of Adiabatic Circuits  (Slides in PDF here)

A good technical overview of adiabatic switching from a leading textbook: These guys actually made sensitive experimental measurements (using Peltier coolers) verifying the predicted low energy dissipation of adiabatic circuits: Lecture 13: Split-level charge recovery logic (Slides in PDF here)

A detailed example of a pipelineable, fully reversible, universal logic family.

Lecture 14: Accomodating Reversibility in Logic Designs (Slides in PDF here)

To understand how it is possible to build complex computational circuits using only logically reversible gates, you first should understand a little more about the general theory of reversible computing.

The following Feynman chapter was assigned earlier in week 2, but if you didn't read it all then, you might want to look through it again over the course of this week and next. The following historic paper first established that it is theoretically possible to compute in an entirely logically-reversible fashion without accumulating garbage information (digital entropy). This next paper applies the same insights to a boolean logic-circuit model of computation, showing that reversible boolean circuits are capable of universal computation. Next is a very simple example of a programmable, universal, parallel reversible processor that is a proof-of-concept that such a thing can indeed be built using SCRL. This circuit can be programmed to simulate any reversible circuit. Lecture 15: More on Adiabatic Circuits (Slides in PDF here)

If you're really that interested, the following describes the design of an entire reversible RISC-style CPU using SCRL.

Here's Hall's 1992 paper on a not fully-pipelined, but otherwise fine adiabatic circuit style based on abstract swiches (which could actually be implemented in CMOS using transmission gates and dual-rail signals). Even in a more heavily pipelined reversible architecture like SCRL, this "retractile cascade" idea is still useful within individual pipeline stages. The idea also permits avoiding the order N2 delay elements that would be required in a reversible N-bit adder in pure fully-pipelined style such as SCRL. Lecture 16: Issues in Designing Efficient Resonant Power Supplies (Slides in PDF here) The following papers describe a resonant clock-waveform generation technique. Although these papers focus on square wave generation, the same technique can also be used to approximate any desired periodic waveform, including the trapezoidal waveforms required for driving adiabatic circuits. The following web page presents some data I gathered in late 1997 regarding the suitability (or lack thereof) of MEMS switches/relays for use in adiabatic circuits. Better MEMS switches than these are probably available by now. Lecture 17: Adiabatic Circuits: Wrap-Up (Slides in PDF here)

Additional Resources

Here are some web links where you can find additional papers, information, and resources on adiabatic circuits and reversible logic.

Written assignment #5: (due Mon. 2/21)

This is our standing written assignment.  It should be on the subject of the above lectures and reading material.