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Minix Cross Reference
Minix/kernel/type.h


  1 #ifndef TYPE_H
  2 #define TYPE_H
  3 
  4 typedef _PROTOTYPE( void task_t, (void) );
  5 typedef _PROTOTYPE( int (*rdwt_t), (message *m_ptr) );
  6 typedef _PROTOTYPE( void (*watchdog_t), (void) );
  7 
  8 struct tasktab {
  9   task_t *initial_pc;
 10   int stksize;
 11   char name[8];
 12 };
 13 
 14 struct memory {
 15   phys_clicks base;
 16   phys_clicks size;
 17 };
 18 
 19 /* Administration for clock polling. */
 20 struct milli_state {
 21   unsigned long accum_count;    /* accumulated clock ticks */
 22   unsigned prev_count;          /* previous clock value */
 23 };
 24 
 25 #if (CHIP == INTEL)
 26 typedef unsigned port_t;
 27 typedef unsigned segm_t;
 28 typedef unsigned reg_t;         /* machine register */
 29 
 30 /* The stack frame layout is determined by the software, but for efficiency
 31  * it is laid out so the assembly code to use it is as simple as possible.
 32  * 80286 protected mode and all real modes use the same frame, built with
 33  * 16-bit registers.  Real mode lacks an automatic stack switch, so little
 34  * is lost by using the 286 frame for it.  The 386 frame differs only in
 35  * having 32-bit registers and more segment registers.  The same names are
 36  * used for the larger registers to avoid differences in the code.
 37  */
 38 struct stackframe_s {           /* proc_ptr points here */
 39 #if _WORD_SIZE == 4
 40   u16_t gs;                     /* last item pushed by save */
 41   u16_t fs;                     /*  ^ */
 42 #endif
 43   u16_t es;                     /*  | */
 44   u16_t ds;                     /*  | */
 45   reg_t di;                     /* di through cx are not accessed in C */
 46   reg_t si;                     /* order is to match pusha/popa */
 47   reg_t fp;                     /* bp */
 48   reg_t st;                     /* hole for another copy of sp */
 49   reg_t bx;                     /*  | */
 50   reg_t dx;                     /*  | */
 51   reg_t cx;                     /*  | */
 52   reg_t retreg;                 /* ax and above are all pushed by save */
 53   reg_t retadr;                 /* return address for assembly code save() */
 54   reg_t pc;                     /*  ^  last item pushed by interrupt */
 55   reg_t cs;                     /*  | */
 56   reg_t psw;                    /*  | */
 57   reg_t sp;                     /*  | */
 58   reg_t ss;                     /* these are pushed by CPU during interrupt */
 59 };
 60 
 61 struct segdesc_s {              /* segment descriptor for protected mode */
 62   u16_t limit_low;
 63   u16_t base_low;
 64   u8_t base_middle;
 65   u8_t access;                  /* |P|DL|1|X|E|R|A| */
 66 #if _WORD_SIZE == 4
 67   u8_t granularity;             /* |G|X|0|A|LIMT| */
 68   u8_t base_high;
 69 #else
 70   u16_t reserved;
 71 #endif
 72 };
 73 
 74 typedef _PROTOTYPE( int (*irq_handler_t), (int irq) );
 75 
 76 #endif /* (CHIP == INTEL) */
 77 
 78 #if (CHIP == M68000)
 79 typedef _PROTOTYPE( void (*dmaint_t), (void) );
 80 
 81 typedef u32_t reg_t;            /* machine register */
 82 
 83 /* The name and fields of this struct were chosen for PC compatibility. */
 84 struct stackframe_s {
 85   reg_t retreg;                 /* d0 */
 86   reg_t d1;
 87   reg_t d2;
 88   reg_t d3;
 89   reg_t d4;
 90   reg_t d5;
 91   reg_t d6;
 92   reg_t d7;
 93   reg_t a0;
 94   reg_t a1;
 95   reg_t a2;
 96   reg_t a3;
 97   reg_t a4;
 98   reg_t a5;
 99   reg_t fp;                     /* also known as a6 */
100   reg_t sp;                     /* also known as a7 */
101   reg_t pc;
102   u16_t psw;
103   u16_t dummy;                  /* make size multiple of reg_t for system.c */
104 };
105 
106 struct fsave {
107   struct cpu_state {
108         u16_t i_format;
109         u32_t i_addr;
110         u16_t i_state[4];
111   } cpu_state;
112   struct state_frame {
113         u8_t frame_type;
114         u8_t frame_size;
115         u16_t reserved;
116         u8_t frame[212];
117   } state_frame;
118   struct fpp_model {
119         u32_t fpcr;
120         u32_t fpsr;
121         u32_t fpiar;
122         struct fpN {
123                 u32_t high;
124                 u32_t low;
125                 u32_t mid;
126         } fpN[8];
127   } fpp_model;
128 };
129 #endif /* (CHIP == M68000) */
130 
131 #if (MACHINE == SUN)
132 
133 typedef u32_t reg_t;
134 
135 /*
136  * The context structure on the SPARC is quite complex, with lots of
137  * sub-structures etc.  We will cheat a bit by just having an
138  * array of words, with some #defines to tell us where things of
139  * interest are.
140  */
141 
142 struct stackframe_s {
143     reg_t context[CONTEXT_SIZE / sizeof(reg_t)];
144 };
145 
146 #define pc context[PC]
147 #define npc context[NPC]
148 #define sp context[SP]
149 #define psw context[PSW]
150 #define retreg context[O0]
151 
152 #define sc_psw sc_regs.context[PSW]
153 
154 /*
155  * include offsets into a SunOS ucontext structure, as determined
156  * by the make_offset program.
157  */
158 #include "uc_offset.h"
159 
160 #define SP   (O6)
161 #define PSW  (UC_PSW)
162 #define PC   (PSW + 1)
163 #define NPC  (PSW + 2)
164 #define Y    (PSW + 3)
165 #define O0   (PSW + 11)
166 #define O1   (PSW + 12)
167 #define O2   (PSW + 13)
168 #define O3   (PSW + 14)
169 #define O4   (PSW + 15)
170 #define O5   (PSW + 16)
171 #define O6   (PSW + 17)
172 #define O7   (PSW + 18)
173 
174 #endif /* (MACHINE == SUN) */
175 
176 #endif /* TYPE_H */
177 

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