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Minix Cross Reference
Minix/kernel/const.h


  1 /* $Id: const.h,v 1.5 1996/07/09 19:41:30 paul Exp $ */
  2 
  3 /* General constants used by the kernel. */
  4 
  5 #if (CHIP == INTEL)
  6 
  7 #define K_STACK_BYTES   1024    /* how many bytes for the kernel stack */
  8 
  9 #define INIT_PSW      0x0200    /* initial psw */
 10 #define INIT_TASK_PSW 0x1200    /* initial psw for tasks (with IOPL 1) */
 11 #define TRACEBIT       0x100    /* OR this with psw in proc[] for tracing */
 12 #define SETPSW(rp, new) /* permits only certain bits to be set */ \
 13         ((rp)->p_reg.psw = (rp)->p_reg.psw & ~0xCD5 | (new) & 0xCD5)
 14 
 15 /* Initial sp for mm, fs and init.
 16  *      2 bytes for short jump
 17  *      2 bytes unused
 18  *      3 words for init_org[] used by fs only
 19  *      3 words for real mode debugger trap (actually needs 1 more)
 20  *      3 words for save and restart temporaries
 21  *      3 words for interrupt
 22  * Leave no margin, to flush bugs early.
 23  */
 24 #define INIT_SP (2 + 2 + 3 * 2 + 3 * 2 + 3 * 2 + 3 * 2)
 25 
 26 #define HCLICK_SHIFT       4    /* log2 of HCLICK_SIZE */
 27 #define HCLICK_SIZE       16    /* hardware segment conversion magic */
 28 #if CLICK_SIZE >= HCLICK_SIZE
 29 #define click_to_hclick(n) ((n) << (CLICK_SHIFT - HCLICK_SHIFT))
 30 #else
 31 #define click_to_hclick(n) ((n) >> (HCLICK_SHIFT - CLICK_SHIFT))
 32 #endif
 33 #define hclick_to_physb(n) ((phys_bytes) (n) << HCLICK_SHIFT)
 34 #define physb_to_hclick(n) ((n) >> HCLICK_SHIFT)
 35 
 36 /* Interrupt vectors defined/reserved by processor. */
 37 #define DIVIDE_VECTOR      0    /* divide error */
 38 #define DEBUG_VECTOR       1    /* single step (trace) */
 39 #define NMI_VECTOR         2    /* non-maskable interrupt */
 40 #define BREAKPOINT_VECTOR  3    /* software breakpoint */
 41 #define OVERFLOW_VECTOR    4    /* from INTO */
 42 
 43 /* Fixed system call vector. */
 44 #define SYS_VECTOR        32    /* system calls are made with int SYSVEC */
 45 #define SYS386_VECTOR     33    /* except 386 system calls use this */
 46 #define LEVEL0_VECTOR     34    /* for execution of a function at level 0 */
 47 
 48 /* Suitable irq bases for hardware interrupts.  Reprogram the 8259(s) from
 49  * the PC BIOS defaults since the BIOS doesn't respect all the processor's
 50  * reserved vectors (0 to 31).
 51  */
 52 #define BIOS_IRQ0_VEC   0x08    /* base of IRQ0-7 vectors used by BIOS */
 53 #define BIOS_IRQ8_VEC   0x70    /* base of IRQ8-15 vectors used by BIOS */
 54 #define IRQ0_VECTOR     0x28    /* more or less arbitrary, but > SYS_VECTOR */
 55 #define IRQ8_VECTOR     0x30    /* together for simplicity */
 56 
 57 /* Hardware interrupt numbers. */
 58 #define NR_IRQ_VECTORS    16
 59 #define CLOCK_IRQ          0
 60 #define KEYBOARD_IRQ       1
 61 #define CASCADE_IRQ        2    /* cascade enable for 2nd AT controller */
 62 #define ETHER_IRQ          3    /* default ethernet interrupt vector */
 63 #define SECONDARY_IRQ      3    /* RS232 interrupt vector for port 2 */
 64 #define RS232_IRQ          4    /* RS232 interrupt vector for port 1 */
 65 #define XT_WINI_IRQ        5    /* xt winchester */
 66 #define FLOPPY_IRQ         6    /* floppy disk */
 67 #define PRINTER_IRQ        7
 68 #define AT_WINI_IRQ       14    /* at winchester */
 69 
 70 /* Interrupt number to hardware vector. */
 71 #define BIOS_VECTOR(irq)        \
 72         (((irq) < 8 ? BIOS_IRQ0_VEC : BIOS_IRQ8_VEC) + ((irq) & 0x07))
 73 #define VECTOR(irq)     \
 74         (((irq) < 8 ? IRQ0_VECTOR : IRQ8_VECTOR) + ((irq) & 0x07))
 75 
 76 /* BIOS hard disk parameter vectors. */
 77 #define WINI_0_PARM_VEC 0x41
 78 #define WINI_1_PARM_VEC 0x46
 79 
 80 /* 8259A interrupt controller ports. */
 81 #define INT_CTL         0x20    /* I/O port for interrupt controller */
 82 #define INT_CTLMASK     0x21    /* setting bits in this port disables ints */
 83 #define INT2_CTL        0xA0    /* I/O port for second interrupt controller */
 84 #define INT2_CTLMASK    0xA1    /* setting bits in this port disables ints */
 85 
 86 /* Magic numbers for interrupt controller. */
 87 #define ENABLE          0x20    /* code used to re-enable after an interrupt */
 88 
 89 /* Sizes of memory tables. */
 90 #define NR_MEMS            3    /* number of chunks of memory */
 91 
 92 /* Miscellaneous ports. */
 93 #define PCR             0x65    /* Planar Control Register */
 94 #define PORT_B          0x61    /* I/O port for 8255 port B (kbd, beeper...) */
 95 #define TIMER0          0x40    /* I/O port for timer channel 0 */
 96 #define TIMER2          0x42    /* I/O port for timer channel 2 */
 97 #define TIMER_MODE      0x43    /* I/O port for timer mode control */
 98 
 99 #endif /* (CHIP == INTEL) */
100 
101 #if (CHIP == M68000)
102 
103 #define K_STACK_BYTES   1024    /* how many bytes for the kernel stack */
104 
105 /* Sizes of memory tables. */
106 #define NR_MEMS            2    /* number of chunks of memory */
107 
108 /* p_reg contains: d0-d7, a0-a6,   in that order. */
109 #define NR_REGS           15    /* number of general regs in each proc slot */
110  
111 #define TRACEBIT      0x8000    /* or this with psw in proc[] for tracing */
112 #define SETPSW(rp, new)         /* permits only certain bits to be set */ \
113         ((rp)->p_reg.psw = (rp)->p_reg.psw & ~0xFF | (new) & 0xFF)
114  
115 #define MEM_BYTES  0xffffffff   /* memory size for /dev/mem */
116  
117 #ifdef __ACK__
118 #define FSTRUCOPY
119 #endif
120 
121 #endif /* (CHIP == M68000) */
122 
123 /* The following items pertain to the scheduling queues. */
124 #define TASK_Q             0    /* ready tasks are scheduled via queue 0 */
125 #define SERVER_Q           1    /* ready servers are scheduled via queue 1 */
126 #define USER_Q             2    /* ready users are scheduled via queue 2 */
127 
128 #if (SHADOWING == 1)
129 #define SHADOW_Q           3    /* runnable, but shadowed processes */
130 #define NQ                 4    /* # of scheduling queues */
131 #else
132 #define NQ                 3    /* # of scheduling queues */
133 #endif
134 
135 /* Env_parse() return values. */
136 #define EP_UNSET        0       /* variable not set */
137 #define EP_OFF          1       /* var = off */
138 #define EP_ON           2       /* var = on (or field left blank) */
139 #define EP_SET          3       /* var = 1:2:3 (nonblank field) */
140 
141 /* To translate an address in kernel space to a physical address.  This is
142  * the same as umap(proc_ptr, D, vir, sizeof(*vir)), but a lot less costly.
143  */
144 #if (MACHINE == SUN)
145 #define vir2phys(vir)   ((phys_bytes) (vir))
146 #else
147 #define vir2phys(vir)   (data_base + (vir_bytes) (vir))
148 #endif
149 
150 #define printf printk   /* the kernel really uses printk, not printf */
151 
152 #if (MACHINE == SUN)
153 
154 #define MLOGIN_HANGUP   0xff    /* Sent by mlogin when it is about to exit */
155 #define TRACEBIT           0
156 #define NR_MEMS            4
157 #define K_STACK_BYTES   8192    /* how many bytes for the kernel stack */ 
158 #define MEM_BYTES  0x1000000    /* memory size for /dev/mem */
159 #define ALIGNMENT          8    /* align large items to a multiple of this */
160 
161 #define INIT_PSW      0x0000    /* psw is not used in smx */
162 #define INIT_TASK_PSW 0x0000
163 /* #define INIT_SP       in <minix/const.h> */
164 
165 
166 /*
167  * SunOS descriptors on which the bootstrap program opens variours smx
168  * "devices".  Currently, these definitions all for up to 10 console
169  * and 10 smx filesystems.
170  */
171 #define TERMINAL_FD     20      /* first SunOS descriptor for terminals */
172 #define DISK_FD         40      /* first SunOS descriptor for disks */
173 #define SOCKET_FD       50      /* the SunOS descriptor for socket */
174 #define LOGGING_FD      51      /* SunOS descriptor for a logfile */
175 #define RAM_FD          52      /* mmap'ed file acting as smx memory */
176 #define ETHER_FD        53      /* connection to the ethernet relay */
177 
178 /*
179  * Possible protection levels.
180  */
181 #define NO_PROT   0
182 #define HALF_PROT 1
183 #define FULL_PROT 2
184 
185 #endif /* MACHINE == SUN */
186 

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