COP 5255 Concurrent Programming

Spring 2007

 

Contact Information

Instructor:

Dr. Beverly Sanders
CSE 322
sanders@cise.ufl.edu  Important:  Please put COP5255 in the subject line of all emails you send to me about the course
(352) 392-1528
Office hours:  
    Monday 9:35-10:25
    Wednesday 3:00-3:50
    By appointment
    Just dropping by or calling in the afternoon is also OK (although I might not be there or could be busy)

TA:  

KyungHee Kim
khkim@cise.ufl.edu
CSE312
Office hours:  
    Tuesday 9:35-10:25
    Friday 11:45-12:35

WebCT Vista (http://lss.at.ufl.edu ) will be used for handouts, homework submission, etc.  Login using your gatorlink id and password.

 

Announcements (check frequently)

5/3  HW4 is graded on WebCT. Overall result can be found here.
I'll change my Friday office hour to 3:30PM~4:20PM.
Note that this is the last chance to regrade. Good luck! -- Kyung Hee

5/1  Typo in problem 1 on the FinalSp06 (and in lecture 21, slide 51).  Delete the ! in the guard of the while loop to get

public class TASLock implements Lock

{  private AtomicBoolean state = new AtomicBoolean(false);

public void lock()

{  while(state.getAndSet(true)){/*spin*/} }

public  void unlock()

{  state.set(false); }

}

4/29   Submit HW4 through email. Send your jar file to khkim@cise.ufl.edu before due.
I'll use the timestamp of email as your submission time.

4/26   My Friday(4/27) office hour will be moved to 8:30~9:20AM for this week only. -- Kyung Hee

4/24

         Slides for today are available on WebCT

         Final exam--May 4, 10am-12 in the usual classroom

        Cumulative—it may cover material from the entire semester

        4 pages notes are allowed

        Bring a photo ID

         Final reports due April 27. 

        Both electronic via WebCT and a hardcopy. 

        Don’t forget to turn your preliminary report back in.

        If I’m not in my office, get a time stamp and turn it in in CISE 301 (Please do not slip it under my door.)

         I will be around during my normal office hours in the next two weeks, but feel free to stop by or make an appointment for another time.

4/19   Links to Demo Pages. If you find any error at your link, email to khkim@cise.ufl.edu ASAP.

4/17   Slides through today are available.  If you missed class, make sure you look at the first few slides discussing the demos in Lecture 34 before Thursday.  The evaluation form is available on the class home page in WebCT.

·        Send your project’s URL to khkim@cise.ufl.edu by 11am.

·        Submit project source code to WebCT by 1pm.  (deadline is firm!)

·        Start you server on a CISE machine before class

·        Please be a few minutes early so we can start promptly

·        We will meet in the lab CSE E115.

4/13   Slides through 4/12 are available

4/12   HW4 posted.  Also, “WebCT assignments” for submission of the final project code and reports have been created.  Remember that the project deadlines are firm and no late submissions will be accepted for either part.  We may ask you to run your submitted code for the demo, so make sure the jar file you submit is complete.  You do not need to submit an electronic version of the preliminary report.

4/11   Preliminary reports were returned in class yesterday.   In order to get points for the preliminary report, you must turn these in again along with the hard copy of your final project.

4/11   Here is a link to a talk about the Java memory model given recently at Google by Jeremy Manson, one of the people who worked on the memory model spec.    The slides may be difficult to see on the video but can be found here. 

4/11   Solutions to the midterm posted in the Exams folder on webCT.  Slides through 4/5 available in the slides folder.

4/4     Please, check WebCT mail. Those who received mail from TA need to notify your project group information ASAP.

4/3     Slides through 4/3 available

3/28   Slides through 3/27 available.

3/26   Slides through 3/22 available.

3/20   Slides through 3/20 available.  Project partners due Thursday.

3/19   My Tuesday/Friday office hour will be moved to Friday 10:00~11:40AM for this week only.
Sorry for any inconvenience. -- Kyung Hee

3/2   HW3 graded.

- Point distribution : 1.10 2.a)30 b)20 c)20 d)20 Total:100
- Questions regarding the grade, please send email to
khkim@cise.ufl.edu

2/27   Old exams are in the exams folder. Slides from today have been posted.  Midterm on 3/1—two pages notes allowed.

2/23   Slides through 2/22 available

2/22   HW2 graded.

- Point distribution : 1.a)5 b)10 c)20 d)10 e)25 2.30 Total:100
- Questions regarding the grade, please send email to
khkim@cise.ufl.edu

2/22  If you are interested in this issue, see http://weblogs.java.net/blog/alexfromsun/archive/2005/11/debugging_swing_1.html and the followups for a discussion about using the event dispatch thread in Swing.  In particular, note the comments Posted by: stepanrutz on November 27, 2005 at 12:12 AM, and Posted by: rbair on November 28, 2005 at 09:24 AM

2/20  Slides for today posted

2/15  HW3 was posted Tuesday. Slides for lectures through today available.

2/14   Grades for HW1 updated. Please, check WebCT.
My
Friday office hour will be moved to 10:00~10:50AM for this week only. Sorry for any inconvenience. -- Kyung Hee

2/13   HW1 graded.

- Point distribution : 1.a)10 b)10 c)10 d)10 2.30 3.30 Total:100
- Questions regarding the grade, please send email to
khkim@cise.ufl.edu

2/6  Homework 2 posted.  Note that this is due in one week.

2/2  Slides for lectures through 2/1 available. 

For another treatment of assertions, invariants, etc. in concurrent programming; see Gregory Andrews, Foundations of Multithreaded, Parallel, and Distributed Programming, Addison Wesley, 2000. or  Concurrent Programming: Principles and Practice, Benjamin/Cummings, 1991 by the same author.  The older book is a little better on this particular subject, but not as up-to-date otherwise. 

2/1  FYI:  IBM Cell BE student programming contest  (They offer cash prizes)

1/30  Suggested reading on the Java memory model:  http://www.cs.umd.edu/~pugh/java/memoryModel/jsr-133-faq.html

1/26  Slides for lectures through 1/25 available. 

1/26   HW1 submission should have two files attached.

- Word or PDF file for problem 1(hw1.pdf or hw1.doc)
- JAR file(
hw1.jar) for problem2 and problem3 together.

@ hw1.jar should include at least three files - SafeEvent.java, SafeLog.java, TestLog.java
@ You don't need to include jcip-annotations.zip
@ Test your program at CISE unix machine before submitting. I'll test your program on eclipse.cise.ufl.edu
@ Put your codes under directory "hw1"(package hw1)

1/25  A corrected version of Log.java uploaded this morning (Event2 » Event).  Also, see the HW1 FAQ .
1/23  HW1 posted on WebCT
1/22  Slides for lectures 3-4 (class on 1/18) posted.
1/22 There will be a Barr Systems Colloquium of interest to us on 2/2 at 4pm.  Please put this on your calendar and plan to attend.

Title: Single-chip multiprocessors: a new landscape for computer
architecture and beyond

Professor Guri Sohi
Computer Sciences Department
University of Wisconsin-Madison

 

The past 25 years have been a very exciting time for computer architecture.
A lot of this excitement was due to new opportunities made available by
semiconductor technology: once basic uniprocessor functionality could be
implemented on a chip, additional transistor resources could be used
for innovative uniprocessor microarchitectures.  The microarchitecture of
uniprocessors was totally redefined by this wave of innovation.
The net result is that the microarchitecture of a high-performance
uniprocessor today barely resembles that of one from 20 years ago.
And the rest of the computing community enjoyed continuous increases
in performance in a completely transparent manner.

Today we are at the cusp of another inflection point in computer
architecture. Technology allows for multiple processing cores to be
put on a single chip; the resulting chip resembles a traditional
small-scale multiprocessor. Going further, we expect a revolution in
the architecture and microarchitecture of multicore chips (also know
as chip multiprocessors (CMPs)), as technology advances provide us
with more transistors with which to innovate. This revolution will
encompass almost every aspect of multiprocessing, including new models
for parallelization, new processor microarchitectures that trade off
instruction-level parallelism for thread-level parallelism, new ways
of allowing reliable operation from unreliable hardware components,
and innovative ways of using storage components to architect memory
hierarchies, among others.  Unlike the past, however, software will
not be able to reap the benefits of hardware innovation transparently.
Applications and software will have to be more proactive in availing
of the hardware capabilities, and certain types of applications may
be better enabled than others.

This talk will present some initial results towards components of the
overall revolution: innovations in the microarchitecture of multicore
processors and memory hierarchies, and their likely impact on software
and applications.

1/16 slides for lectures 1 and 2 are in the “slides” folder on WebCt

1/9  hw_0 posted on WebCT
1/9  No class on Thursday, Jan 11.

Important dates

Midterm--in class

March 1 (tentative)

Demos

April 19, April 24

Final exam

May 4, 10am-12